1. Field of the Invention
The present invention relates to a programmable controller for executing a sequence instruction comprising a bit computation instruction, numerical computation instruction, or the like at high speed.
2. Description of the Related Art
FIG. 1 is a block diagram showing a conventional programmable controller. In FIG. 1, a program memory 1, a data memory 3, and a sequence execution control unit 5 are connected to a common address bus 7 and a data bus 9. As shown in FIG. 2, the program memory 1 stores sequence instructions each comprising an instruction field 1A and an operand field 1B. The data memory 3 stores computation data of process I/O data, an internal output, and the like. The sequence execution control unit 5 executes a sequence computation, e.g., a bit computation or numerical computation on the basis of the instruction field fetched from the program memory 1 and computation data from the data memory 3.
Each numerical computation instruction is constituted by a word comprising a numerical computation instruction code and an instruction type, and words comprising operand instruction codes and operand addresses, as shown in FIG. 3. The sequence execution control unit 5 comprises an instruction register 11 for holding sequence instructions (numerical computation instruction, bit computation instruction, and the like) fetched from the program memory 1, a data register file 13 for holding operands read out from the data memory 3, an instruction pointer 15 for supplying a location address to the program memory 1 and the data memory 3, and a bit/numerical computation processor 17. The bit/numerical computation processor 17 supplies a location address for the program memory 1 held in the instruction pointer 15 to the program memory 1. Assume that the instruction pointer 15 stores an address "n", as shown in FIG. 3. The program memory 1 outputs a corresponding sequence instruction to the instruction register 11 through the data bus 9 in response to the input location address "n". As a result, as shown in FIG. 3, the numerical computation instruction code and the instruction type are held in the instruction register 11. The numerical computation instruction code indicates that the sequence command is a numerical computation instruction. When the sequence instruction code indicates a bit computation instruction, a bit computation instruction code is stored in the program memory 1 in place of the numerical computation instruction code. The instruction type indicates the type of instruction (e.g., addition, subtraction, or the like) of numerical computation instructions. The bit/numerical computation processor 17 detects the numerical computation instruction code and the computation type by decoding the content held in the register 11. The bit/numerical computation processor 17 then increments the instruction pointer 15 by "1" to supply an address "n+1" to the program memory 1. As a result, the program memory 1 outputs an operand instruction code and an operand A address to the instruction register 11. Therefore, the bit/numerical computation processor 17 detects by decoding that the content of the instruction register 11 is operand data, and supplies the operand A address to the data memory 3 through the address bus 7. The data memory 3 outputs the content at a location corresponding to the operand A address to the register file 13.
Similarly, an operand B address is supplied to the data memory 3 to obtain an operand B. Therefore, the bit/numerical computation processor 17 performs a numerical computation of the operands A and B. Furthermore, the bit/numerical computation processor 17 writes the numerical computation result at an operand C address. The above-mentioned processing is shown in the timing charts of FIGS. 4A through 4F. FIG. 4B shows a processing content. As shown in FIG. 4B, read access of an operand address (OA1), read access of operand data (OD1), incrementing of the instruction pointer (IP), read access of an operand address (OA2), read access of operand data (OD2), execution of an instruction, incrementing of the instruction pointer (IP), read access of an operand address (OA3), read access of operand data (OD3), and storage of a computation result are sequentially executed. As shown in FIG. 4B, an execution time of one numerical computation instruction corresponds to a total sum of an instruction fetch time, an operand data fetch time, and an instruction execution time. A time required for fetching an instruction or operand data is considerably longer than the instruction execution time. For this reason, the sequence instruction cannot be executed at high speed.